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Product category: Design and Development Software
News Release from: Zuken | Subject: Cadstar FPGA
Edited by the Electronicstalk Editorial Team on 01 November 2007

Software partnership aids FPGA
simulation

Cadstar FPGA technology is structured on integration of FPGA design within the PCB layout.

Cadstar FPGA combines Aldec's Active-HDL Lite verification tool and Zuken's desktop PCB design suite, Cadstar, allowing engineers to perform mixed-language simulation for vendor-neutral FPGAs within the Cadstar environment The relationship between the FPGA and PCB design processes is an area where synchronisation can deliver opportunities for increased efficiency in the design process

Cadstar FPGA technology is structured on integration of FPGA design within the PCB layout.

The concurrent and collaborative process that this tool provides is made simple using the Design Flow Manager.

This eliminates manual movement and back-annotation requirements, reducing time to market while increasing output of right-first-time designs.

Engineers can perform comprehensive FPGA designs with complete support for technology from multiple FPGA vendors including Actel, Altera, Lattice, Quicklogic and Xilinx.

It also performs mixed VHDL and Verilog simulation, strictly adhering to the latest IEEElanguage standards.

Cadstar FPGA provides one universal Project Manager that controls all design files for simulation, synthesis, place and route and pin assignment to the PCB.

This integrated solution supports robust I/O synchronisation between the FPGA device and the PCB, helping to optimise the routing pattern for high-density devices like BGAs.

"By integrating our Cadstar solution with Aldec's Active HDL Lite tool, we are able to offer a one-stop environment for small to medium-sized companies".

"Cadstar FPGA combines the strengths of both companies' solutions, while being competitively priced and easy to use" Jeroen Leinders, Cadstar Distribution Manager said. Request a free brochure from Zuken ...

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