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?Coverification?

An Electronicstalk guide

Start with the news release SoC platform speeds designs to market from Toshiba Electronics Europe, which we summarised at the time by saying "The CPS platform allows designers to take an overall system view of an SoC and perform a number of traditionally sequential and isolated tasks in parallel.". Several months prior to that, we featured the news release Shrink to 40nm increases FPGA capabilities from Altera Europe: "The Stratix IV family has up to 680K logic elements, 2x bigger than Altera's Stratix III family, which currently comprise currently the largest FPGAs on the market.".

In January 2008, we covered the news from Emulation and Verification Engineering (EVE) - take a look at Coverification and virtual platforms come together which says: "Companies will to work together to introduce complementary transactor strategies and roadmaps based on the emerging OSCI TLM2 standard for model interoperability.".

Take a look also at the news release from Cadence Design Systems, Emulator accelerates IC verification, as well as EVE CEO hails 2006 as stunning year from Emulation and Verification Engineering (EVE), and ST leads European embedded project from STMicroelectronics.

Latest stories...
Free controller cores are optimised for FPGAs (January 2007)

Actel Corp has introduced two free controller cores: the small, easy-to-use CoreABC and the configurable Core8051s.

Verification server keeps up with Sun's fast SPARC (March 2006)

Sun Microsystems, has successfully deployed the Cadence Incisive Xtreme Server to verify its latest UltraSPARC T1 processor with CoolThreads technology.

Coverification tool supports Diamond series (February 2006)

The Seamless product is the first coverification tool that supports Tensilica's Diamond series.

Core family offers almost infinite configurations (February 2006)

The Diamond Standard family of processor cores comprises a set of six off-the-shelf synthesisable cores that range from area-efficient, low-power controllers to high-performance DSPs.

Multithreading core aims to cut embedded costs (February 2006)

The new MIPS32 34K family of cores is billed as a revolutionary multithreading solution for high-performance, cost-sensitive embedded applications.

Micronas sale is milestone for verification (December 2005)

ASIC and SoC verification platform specialist ProDesign has sold its 150th Chipit system.

Verification moves to the enterprise level (November 2005)

The Incisive Enterprise family of products offers enterprise-level verification process automation that supports e, SystemC and SystemVerilog.

Help at hand for PowerPC-based SoC design (September 2005)

New services will aid SoC designers embedding PowerPC cores, including silicon validation of a new custom-synthesised design approach.

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