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Laurence Marchini

Laurence Marchini, Editor, writes:

We see from your search that you're looking for information on the term "DRC", and we have a large number of manufacturers' news releases and technical articles here on Electronicstalk which will be of interest. Let me be your guide.
Start with the news release Chip design software stacks up 3D advantages from Micro Magic, which we summarised at the time by saying "A novel design technique known as 'through-Si via wafer stacking' offers a new dimension for chip designs". A few weeks before, we featured the news release Beta testers wanted for IC design rule checker from Polyteda Software Corporation: "Polyteda Software is offering free access to the beta version of a new tool that allows users to perform a full set of logical operations and density checks on IC layers".
In May 2007, we covered the news from Mentor Graphics UK concerning its Calibre LFD - take a look at Infineon and Chartered use litho-friendly design which says: "Mentor Graphics has validated its Calibre LFD (litho-friendly design) results in silicon on 65nm process technology".
Take a look also at the news release from Softjin Technologies, EDA tool stands test of comparison, as well as Power management technology updated from Zarlink Semiconductor, and Viewer offers a quick look at IC designs from Micro Magic.

See also:

Compiler technology complements HyperTransport (January 2007)
CebaTech has joined the HyperTransport Technology Consortium

PVS rule files now for 180nm technology (December 2006)
Synopsys' Hercules Physical Verification Suite (PVS) rule files are now available for Tower Semiconductor's release of 180nm high-voltage technology

Advanced quad development platform unveiled (December 2006)
Lyrtech has launched the Virtex-4 version of its best-selling SignalMaster Quad advanced development platform

Software gives early view of manufacturing defects (November 2006)
InShape is billed as the first model-based full-chip design manufacturability checker that predicts accurate silicon shapes

Process technologies improve power management (November 2006)
Zarlink Semiconductor has announced the release of an enhanced WPX and WPY process with a high beta early voltage lateral PNP transistor

BiCMOS process has powerful intelligence (November 2006)
Submicron BiCMOS process technology specifically addresses increasing customer demand for control and intelligence in power management chips