FPGAs upgrade economical processing
A new second generation of low-cost devices cuts FPGA prices to under $0.50 per 1000 look-up tables in high volume.
Lattice Semiconductor has introduced its second-generation EConomy Plus field programmable gate array (FPGA) devices, the LatticeECP2 family Developed on 90nm Fujitsu CMOS technology using 300mm wafers, this family cuts FPGA prices to under $0.50 per 1000 look-up tables (LUTs) in high volume
Compared with Lattice's first-generation 130nm LatticeECP FPGAs, the new family also increases available logic density to 70,000 LUTs, increases the number of 18x18 multipliers to 88, boosts I/O performance over 50% and enhances configuration capabilities.
Capabilities added for the first time to this class of FPGAs include pre-engineered 400Mbit/s DDR2 memory interface support, configuration bitstream encryption and dual-boot configuration support.
Lattice's low cost LatticeECP2 devices are being announced today simultaneously with its high-end LatticeSC System Chip FPGAs, fabricated on the same technology.